S32K144_PKE HT-3 Configuration

uint8_t rstnPin_Cendric_Reset (void) {

    uint16_t timeCount_5s = 0;

    /* pull down the level of RSTN pin of CENDRIC for 1ms to reset */

    OUTPUT_CLEAR(PTB, PTB11);

    Delay_ms(1);

    OUTPUT_SET(PTB, PTB11);

    for ( ; ; ) {

        /* check the IRQ line in cycle in 5s*/

        if(is_pit_triggered()) {

           ++timeCount_5s;

           if(5000 <= timeCount_5s) {

               printf("\nNo IRQ 5s after resetting CENDRIC...");

               return Cendric_NoIrq;

           }

           if(is_Irq_HighLevel()) {

               Cendric_CMD_NOP(0);

               Cenric_RESP(cendricRespData, CENDRIC_SPI_LENGTH);

               /* clear reset source after reset */

               Cendric_CMD_CLEAR_DEVICE_INFO(1, cendricClrRstnRst , sizeof(cendricClrRstnRst));

               /* restore counter, reset is done */

               timeCount_5s = 0;

               return Cendirc_RstSuccess;

           }

        }

    }

* Note: the length is not fixed,which can be changed */

uint8_t cendricConfigDev[15] = {

        0x08, 0x02, 0x04, 0x40, 0x21, 0x01, 0xD5, 0xFF, 0x10, 0x00, 0x00,

        0x00, 0x01, 0xFF, 0xFF

};

uint8_t cendricConfigAdvanced[6] = {

        0x03, 0xBB, 0xB3, 0xE5, 0x15, 0xF2

};

uint8_t cendricConfigDrv[14] = {

        0xED, 0x02, 0x28, 0x44, 0xED, 0x28, 0xF0, 0x10, 0x82,

        0x38, 0x3F, 0xEB, 0x30, 0xF0

};

uint8_t cendricImpLearning[5] = {

        0x04, 0x01, 0x20, 0x04, 0x05

};

uint8_t cendricDiagResp[1] = { 0x02 };

uint8_t cendricClrRstnRst[1] = { 0x01 };

……

    /* starts PKE LF frame transmission at tx1(High Power Mode) with 1Ap */

    /* HPDR mode TX1-TX2 */

    Cendric_CMD_CONFIG_DEVICE(1, cendricConfigDev, sizeof(cendricConfigDev));

    /* This will bring the LF driver duty cycle closer to the target value of 40% */

    Cendric_CMD_CONFIG_ADVANCED(1, cendricConfigAdvanced, sizeof(cendricConfigAdvanced));

    /* set initial ZEFF = 10 Ohm, initial inductance value = 345uH */

    Cendric_CMD_CONFIG_DRIVER(0, cendricConfigDrv, sizeof(cendricConfigDrv));

    Cendric_CMD_NOP(0);

    Cenric_RESP(cendricRespData, CENDRIC_SPI_LENGTH);

    /* Antenna TX1 impedance learning (384us CW without regulation) */

    Cendric_CMD_START_LF_TRANSMIT_DATA(1, cendricImpLearning, sizeof(cendricImpLearning));

    /* Wait for IRQ in 50ms */

    if( timeout == wait_Irq(50))

    {

        return pkeTask_False;

    }

    Cendric_CMD_NOP(0);

    Cenric_RESP(cendricRespData, CENDRIC_SPI_LENGTH);

    /* get diagnostics information */

    Cendric_CMD_GET_DEVICE_INFO(0, cendricDiagResp, sizeof(cendricDiagResp));

    Cendric_CMD_NOP(0);

    Cenric_RESP(cendricRespData, CENDRIC_SPI_LENGTH);

    /* Wait at minimum 20ms between learning and 1st LF telegram */

    Delay_ms(20);

/* global char variable - IDE,change it according to Key Fob */

uint8_t gcv_Ide[4]={0xA6, 0x6F, 0x35, 0xE1};

……

uint8_t cendricHt3Data[26] = {

        0x14, 0x01, 0x20, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00,

        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

        0x00, 0x00, 0x00, 0x04, 0x01, 0x20, 0x02, 0x5D

};

……

    /* transmit RSSI Single Command via LF signal */

    wakeupId[0] = gcv_Ide[0];

    wakeupId[1] = gcv_Ide[1];

    wakeupId[2] = gcv_Ide[2];

    /* Wake Up ID transmitted */

    /* 1. Swap last byte of IDE

       2. OR with 0x0F */

    wakeupId[3] = (gcv_Ide[3] & 0x00) | ((gcv_Ide[3] & 0x0F) << 4);

    wakeupId[3] |= 0x0F;

    /* calculate MAC to transmit & RESPONSE to validate */

    HT3_MAC_RESPONSE_CAL();

#if (DEBUG == 1)

    printf("\nWakeup ID Value:");

    printf("%02X", giv_Wup);

#endif

    /* store gcv_Ide to meet the requirements of SPI transmission sequence */

    cendricHt3Data[5] = wakeupId[0];

    cendricHt3Data[6] = wakeupId[1];

    cendricHt3Data[7] = wakeupId[2];

    cendricHt3Data[8] = wakeupId[3];

    /* store HT-3 data(12 bytes)

     * Command: 0x0F (1 byte) + 64 bit challenge (8 bytes) +

     * 16 bit MAC (2 bytes) + CRC (1 byte) */

    for (i = 0; i < 12; i++) {

        cendricHt3Data[i + 9] = PKECMDHT3AuthData[i];

    }

    Cendric_CMD_START_LF_TRANSMIT_DATA(0, cendricHt3Data, sizeof(cendricHt3Data));

    /* Wait for IRQ in 50ms */

    if( timeout == wait_Irq(50))

    {

        return pkeTask_False;

    }